1. Field
Various embodiments of the present invention relate to a semiconductor design technique, and more particularly, to a command scheduling method of a memory system having a resistive memory device.
2. Description of the Related Art
Regarding the demands for high capacity and low-power consumption of semiconductor memory devices, research on next-generation memory devices having non-volatility and not having a refresh have been conducted. The next-generation memory devices include a phase-change random access memory (PRAM) using a phase-change material, a resistive random access memory (RRAM) using a variable resistance material such as a transition metal oxide, and a magnetic random access memory (MRAM) using a ferromagnetic material. The resistance of materials consisting of next-generation semiconductor memory elements may be varied in accordance with a voltage or a current supplied into memory devices. Even though the current or voltage supply is interrupted, not only do the materials retain the resistance but a high operating speed is also secured.
Particularly, among such resistive memory devices, a PRAM is applicable to various semiconductor systems and diverse semiconductor memory devices because its data is non-volatile and can be accessed at random.